Exploration of new materials for reducing writing current of SOT-MRAM cells Position filled

Host institution

Imec is a world-leading research and innovation hub in nanoelectronics and digital technologies. We leverage our world-class infrastructure and global ecosystem of partners across diverse industries to enable groundbreaking innovation in application domains, including healthcare, smart cities, mobility, logistics, manufacturing, and energy.

The Magnetic device group (MADE) is using the capabilities of the 300mm state-of-the-art MRAM platform available at Imec to design, explore and evaluate the performance of several different magnetic based devices such as STT, SOT and VCMA MRAMs. Other fundamental aspects of magnetism such as magneto-electric and spin wave devices are explored for both memory and logic applications.

Supervisor

Dr. Sebastien Couet

Description

SOT-MRAM is an emergent class of MRAM which is promising for embedded low-level cache applications with extremely fast operation (sub-ns) and low power [1,2]. To enable SOT-MRAM as competitive technology, increasing the writing efficiency is of uttermost importance. An ambitious target would be to reduce by at least one order of magnitude the current density that is achieved with standard heavy metals (W, Ta, Pt). Topological insulators (TIs) show excellent SOT. 2D materials, such as transition metal dichalcogenide (TMDs), have large spin-orbit coupling (SOC) and can be used to functionalize MRAM properties. However, interfacing those new materials with MRAM stacks, and understanding their fundamental properties, is a challenge.

In this PhD, you will:

• Develop methods to characterize and optimize simplified and full-MTJ stacks deposited on emerging materials such as TIs and/or TMDs.
• Perform extensive device characterization both on lab-based electrical setups as well as industrial probers.
• Generate an in-depth understanding of the complex interplay between spin transport, magnetization dynamics, material properties, and geometry associated with these devices.

By performing this PhD at Imec, you will have the opportunities to contribute both to the fundamental understanding of the SOT physics as well as to enable the practical realization of SOT-MRAM using state-of-the-art industrial fabrication methods on 300mm wafers.

[1] K. Garello et al. IEEE Symposium on VLSI Circuit 81-82 (2018)

[2] Mohit et al. IEDM (2020)

Requirements

• Master’s degree in Physics, material science or related fields.
• Owing to the international nature of the research center, good verbal and written communication skills in English is a must.

Although not mandatory for this position, following prior experience can be an asset:

• Electrical device characterization
• Knowledge within the field of magnetism, spintronics, magnetic tunnel junctions, 2D material growth and characterization

Planned Secondments

CEA (Grenoble, France), under thte supervision of Laurent Vila.

GS (San Sebastián, Spain), under the supervision of Amaia Zurutuza.

Registering University

KU Leuven (Leuven, Belgium).

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