Author: Kaiquan Fan

Work and life in Leuven

Time flies and my second year of PhD is over. Candidates are approaching. After these two years of intensive study, I have fully immersed myself in the world of Spin-Orbit Torque Magnetic Random Access Memory (SOT-MRAM). Working on 300mm wafers, I have measured thousands of devices. This large dataset not only provided me with powerful statistical insights but also allowed me to dive deeper into the underlying physics of voltage-gated spin-orbit torque switching in multi-pillar SOT-MRAM devices. But that’s not all – my research could also make this technology super-efficient and ready for the real world by suppressing operating currents, increasing integration density, etc.

Life isn’t all labs and experiments. Leuven is where the fun gets even better! On a warm afternoon, I cooked up some Chinese BBQs with my friends – think juicy mutton and a symphony of flavors like chili, cumin, and a sprinkle of magic (also known as MSG). Amazingly, pairing it with Belgian beers is like a taste explosion from two different worlds!

Now, it’s time to prepare my interim report and I am looking forward to my upcoming CEA secondment.

Multi-pillar spin-orbit torque magnetoresistive random-access memory (SOT-MRAM)

SOT-MRAM is a promising candidate for next-generation MRAM, as it features switching of the free magnetic layer done by injecting an in-plane current in an adjacent SOT layer. After I joined IMEC last year, my research topic focused on the SOT-MRAM, especially reducing the operation current of SOT-MRAM. Among many solutions, putting serval pillars on one shared SOT track is a genius idea.
Firstly, the multi-pillar design can increase integration density. In conventional single-pillar devices, one pillar needs at least two transistors. While in multi-pillar devices, the number of required transistors per pillar can be reduced to (1+1/N), where N is the number of pillars. The reduced number of transistors can effectively save the space and improve the density of devices.

The schematic of a 4-pillar SOT-MRAM device

However, if we think that the 4 pillars on the same SOT track are totally the same. All pillars will be switched together under a SOT current. Here, combining the voltage-controlled magnetic anisotropy effect, we can lower the operation SOT current by applying a positive voltage on a certain pillar. When we want to switch a pillar, we just need to apply a positive voltage on this pillar and apply a proper SOT current. In this case, we can not only reduce the operation current but also realize the individual control of each pillar even if they are located on the same SOT track.
The story of multi-pillar SOT-MRAM has just begun…

Leuven – history and innovation

It has been seven months since I started my PhD studies in Leuven, a lovely, historic and energetic city.

Leuven is special. With over 600 years of history, old and beautiful buildings are spread all over the city. Wandering around the quaint roads and taking in the amazing views is the best way to release stress. In addition to its rich history and culture, institutions and universities like IMEC provide a brilliant environment for research. My host institution, IMEC, is a world-leading research and innovation hub in nanoelectronics and digital technologies. I’ll never forget how shocked I was when I first saw so many 300 mm wafers in the lab. Moreover, students from KU Leuven breathing life into the city, it’s incredible to see such a perfect combination between history and innovation.

As for the research, I will devote myself in developing SOT-MRAM, which is a promising candidate for next-generation MRAM. As a start to my studies, I have attended many training courses and with the enthusiastic help of my supervisors and colleagues, my studies are progressing very well. So far, I am really enjoying my life in this peaceful city and I hope I could taste all kinds of beers in this kingdom of beer.

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