ESR Blog

Multi-pillar spin-orbit torque magnetoresistive random-access memory (SOT-MRAM)

SOT-MRAM is a promising candidate for next-generation MRAM, as it features switching of the free magnetic layer done by injecting an in-plane current in an adjacent SOT layer. After I joined IMEC last year, my research topic focused on the SOT-MRAM, especially reducing the operation current of SOT-MRAM. Among many solutions, putting serval pillars on one shared SOT track is a genius idea.
Firstly, the multi-pillar design can increase integration density. In conventional single-pillar devices, one pillar needs at least two transistors. While in multi-pillar devices, the number of required transistors per pillar can be reduced to (1+1/N), where N is the number of pillars. The reduced number of transistors can effectively save the space and improve the density of devices.

The schematic of a 4-pillar SOT-MRAM device

However, if we think that the 4 pillars on the same SOT track are totally the same. All pillars will be switched together under a SOT current. Here, combining the voltage-controlled magnetic anisotropy effect, we can lower the operation SOT current by applying a positive voltage on a certain pillar. When we want to switch a pillar, we just need to apply a positive voltage on this pillar and apply a proper SOT current. In this case, we can not only reduce the operation current but also realize the individual control of each pillar even if they are located on the same SOT track.
The story of multi-pillar SOT-MRAM has just begun…

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